1. Technical Field
The present invention relates in general to a system and method for hiding memory latency. More particularly, the present invention relates to a system and method for, in a multi-thread environment, passing control from a first thread to a second thread when the first thread encounters a prolonged instruction.
2. Description of the Related Art
Developers attempt to increase a computer system's performance by improving both the hardware aspects and the software aspects of the computer system. From a hardware perspective, a hardware developer may focus on improving areas such as a microprocessor's speed, bus interface speed, and memory size. From a software perspective, a developer may design an application to invoke multiple threads in order to increase the application's performance. For example, a gaming application may invoke a thread to render terrain data for the left half of a computer screen, and invoke a second thread to render terrain data for the right half of the computer screen. Each thread is given “control” at particular times and it is during these control times that a thread executes instructions.
In addition, a software developer may increase software performance by minimizing code latency. Code latency occurs when one line of code is waiting on another line of code to finish executing. There are instructions, however, that take a prolonged amount of time to execute. These “prolonged instructions” typically include operations that retrieve data from a memory area, such as a Direct Memory Access (DMA) operation. A challenge found with prolonged instructions is removing the latency that results when an application waits for the prolonged instruction to finish.
A further challenge is found when an application invokes multiple threads and one of the threads encounters a prolonged instruction. Because the thread that encountered the prolonged instruction has control, the other threads sit idle.
What is needed, therefore, is a system and method to hide a prolonged instruction's code latency in a multi-thread environment.